MC68HC11E1CFNE3 Freescale Semiconductor, MC68HC11E1CFNE3 Datasheet - Page 55

IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E1CFNE3

Manufacturer Part Number
MC68HC11E1CFNE3
Description
IC MCU 8BIT 3MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11E1CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Controller Family/series
68HC11
No. Of I/o's
38
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC11E
Core
HC11
Data Bus Width
8 bit
Program Memory Size
512 B
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
22
Number Of Timers
8
Operating Supply Voltage
3 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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2.5.1.5 EEPROM Byte Erase
This is an example of how to erase a single byte of EEPROM.
2.5.1.6 CONFIG Register Programming
Because the CONFIG register is implemented with EEPROM cells, use EEPROM procedures to erase
and program this register. The procedure for programming is the same as for programming a byte in the
EEPROM array, except that the CONFIG register address is used. CONFIG can be programmed or
erased (including byte erase) while the MCU is operating in any mode, provided that PTCON in BPROT
is clear.
To change the value in the CONFIG register, complete this procedure.
2.5.2 EEPROM Security
The optional security feature, available only on ROM-based MCUs, protects the EEPROM and RAM
contents from unauthorized access. A program, or a key portion of a program, can be protected against
unauthorized duplication. To accomplish this, the protection mechanism restricts operation of protected
devices to the single-chip modes. This prevents the memory locations from being monitored externally
because single-chip modes do not allow visibility of the internal address and data buses. Resident
programs, however, have unlimited access to the internal EEPROM and RAM and can read, write, or
transfer the contents of these memories.
An enhanced security feature which protects EPROM contents, RAM, and EEPROM from unauthorized
accesses is available in MC68S711E9. Refer to
Specifications
For further information, these engineering bulletins have been included at the back of this data book:
Freescale Semiconductor
1. Erase the CONFIG register.
2. Program the new value to the CONFIG address.
3. Initiate reset.
BYTEE
EB183 —
M68HC711E9PGMR
EB188 —
M68HC711E9PGMR
LDAB
STAB
STAB
LDAB
STAB
JSR
CLR
for the exact part number.
Do not initiate a reset until the procedure is complete.
Enabling the Security Feature on the MC68HC711E9 Devices with PCbug11 on the
Enabling the Security Feature on M68HC811E2 Devices with PCbug11 on the
#$16
$103B
0,X
#$17
$103B
DLY10
$103B
BYTE = 1, ERASE = 1, EELAT = 1
Set to BYTE erase mode
Write any data to address to be erased
BYTE = 1, ERASE = 1, EELAT = 1,
EPGM = 1
Turn on high voltage
Delay 10 ms
Turn off high voltage and set
to READ mode
M68HC11E Family Data Sheet, Rev. 5.1
Chapter 11 Ordering Information and Mechanical
NOTE
EEPROM
55

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