C8051F022-GQR Silicon Laboratories Inc, C8051F022-GQR Datasheet - Page 141

• Manufacturer Part Number: C8051F022-GQR
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F02xr

Specifications of C8051F022-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 336-1200 - DEV KIT FOR F020/F021/F022/F023
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The lock bits can always be read and cleared to logic 0 regardless of the security setting applied to the block contain-
ing the security bytes. This allows additional blocks to be protected after the block containing the security bytes has
been locked. Important Note: The only means of removing a lock once set is to erase the entire program mem-
ory space by performing a JTAG erase operation (i.e. cannot be done in user firmware). Addressing either
security byte while performing a JTAG erase operation will automatically initiate erasure of the entire pro-
gram memory space (except for the reserved area). This erasure can only be performed via JTAG. If a non-
security byte in the 0xFBFF-0xFDFF page is addressed during the JTAG erasure, only that page (including the
security bytes) will be erased.
The FLASH Access Limit security feature (see Figure 15.1) protects proprietary program code and data from being
read by software running on the C8051F020/1/2/3. This feature provides support for OEMs that wish to program the
FLASH Read Lock Byte
Bits7-0: Each bit locks a corresponding block of memory. (Bit7 is MSB).
FLASH Write/Erase Lock Byte
Bits7-0: Each bit locks a corresponding block of memory.
FLASH access Limit Register (FLACL)
Read and Write/Erase Security Bits.
(Bit 7 is MSB.)
Bit
7
6
5
4
3
2
1
0
0xE000 - 0xFDFD
0xC000 - 0xDFFF
0xA000 - 0xBFFF
Memory Block
0x8000 - 0x9FFF
0x6000 - 0x7FFF
0x4000 - 0x5FFF
0x2000 - 0x3FFF
0x0000 - 0x1FFF
0: Read operations are locked (disabled) for corresponding block across the JTAG interface.
1: Read operations are unlocked (enabled) for corresponding block across the JTAG interface.
0: Write/Erase operations are locked (disabled) for corresponding block across the JTAG interface.
1: Write/Erase operations are unlocked (enabled) for corresponding block across the JTAG interface.
NOTE: When the highest block is locked, the security bytes may be written but not erased.
The content of this register is used as the high byte of the 16-bit software read limit address. This 16-
bit read limit address value is calculated as 0xNN00 where NN is replaced by content of this register
on reset. Software running at or above this address is prohibited from using the MOVX and MOVC
instructions to read, write, or erase FLASH locations below this address. Any attempts to read loca-
tions below this limit will return the value 0x00.
Figure 15.1. FLASH Program Memory Map and Security Bytes
Write/Erase Lock Byte
Software Read Limit
Read Lock Byte
SFLE = 0
Reserved
Rev. 1.4
0xFFFF
0xFE00
0xFDFF
0xFDFE
0xFDFD
0x0000
Memory Space
Program/Data
C8051F020/1/2/3
Scratchpad Memory
SFLE = 1
(Data only)
0x007F
0x0000
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