C8051F022-GQR Silicon Laboratories Inc, C8051F022-GQR Datasheet - Page 247

• Manufacturer Part Number: C8051F022-GQR
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F02xr

Specifications of C8051F022-GQR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 336-1200 - DEV KIT FOR F020/F021/F022/F023
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
TF4
R/W
Bit7
TF4: Timer 4 Overflow Flag.
Set by hardware when Timer 4 overflows. When the Timer 4 interrupt is enabled, setting this bit
causes the CPU to vector to the Timer 4 interrupt service routine. This bit is not automatically cleared
by hardware and must be cleared by software. TF4 will not be set when RCLK1 and/or TCLK1 are
logic 1.
EXF4: Timer 4 External Flag.
Set by hardware when either a capture or reload is caused by a high-to-low transition on the T4EX
input pin and EXEN4 is logic 1. When the Timer 4 interrupt is enabled, setting this bit causes the
CPU to vector to the Timer 4 Interrupt service routine. This bit is not automatically cleared by hard-
ware and must be cleared by software.
RCLK1: Receive Clock Flag for UART1.
Selects which timer is used for the UART1 receive clock in modes 1 or 3.
0: Timer 1 overflows used for receive clock.
1: Timer 4 overflows used for receive clock.
TCLK1: Transmit Clock Flag for UART1.
Selects which timer is used for the UART1 transmit clock in modes 1 or 3.
0: Timer 1 overflows used for transmit clock.
1: Timer 4 overflows used for transmit clock.
EXEN4: Timer 4 External Enable.
Enables high-to-low transitions on T4EX to trigger captures or reloads when Timer 4 is not operating
in Baud Rate Generator mode.
0: High-to-low transitions on T4EX ignored.
1: High-to-low transitions on T4EX cause a capture or reload.
TR4: Timer 4 Run Control.
This bit enables/disables Timer 4.
0: Timer 4 disabled.
1: Timer 4 enabled.
C/T4: Counter/Timer Select.
0: Timer Function: Timer 4 incremented by clock defined by T4M (CKCON.6).
1: Counter Function: Timer 4 incremented by high-to-low transitions on external input pin (T2).
CP/RL4: Capture/Reload Select.
This bit selects whether Timer 4 functions in capture or auto-reload mode. EXEN4 must be logic 1 for
high-to-low transitions on T4EX to be recognized and used to trigger captures or reloads. If RCLK1
or TCLK1 is set, this bit is ignored and Timer 4 will function in auto-reload mode.
0: Auto-reload on Timer 4 overflow or high-to-low transition at T4EX (EXEN4 = 1).
1: Capture on high-to-low transition at T4EX (EXEN4 = 1).
EXF4
R/W
Bit6
Figure 22.28. T4CON: Timer 4 Control Register
RCLK1
R/W
Bit5
TCLK1
R/W
Bit4
EXEN4
R/W
Bit3
Rev. 1.4
TR4
R/W
Bit2
C/T4
C8051F020/1/2/3
R/W
Bit1
CP/RL4
R/W
Bit0
SFR Address:
00000000
Reset Value
0xC9
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