M30626SPGP#U3C Renesas Electronics America, M30626SPGP#U3C Datasheet - Page 273

• Manufacturer Part Number: M30626SPGP#U3C
• Description: IC M16C/62P MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626SPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
21.1
21.2
21.3
21.4
Figure 21.7 shows the PDi Registers.
This register selects whether the I/O port is to be used for input or output. The bits in this register correspond one
for one to each port.
During memory extension and microprocessor modes, the PDi registers for the pins functioning as bus control pins
(A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA, and BCLK) cannot
be modified.
No direction register bit for P8_5 is available.
Figure 21.8 shows the Pi Registers.
Data input/output to and from external devices are accomplished by reading and writing to the Pi register.
The Pi register consists of a port latch to hold the input/output data and a circuit to read the pin status. For ports set
for input mode, the input level of the pin can be read by reading the corresponding Pi register, and data can be
written to the port latch by writing to the Pi register.
For ports set for output mode, the port latch can be read by reading the corresponding Pi register, and data can be
written to the port latch by writing to the Pi register. The data written to the port latch is output from the pin. The
bits in the Pi register correspond one for one to each port.
During memory extension and microprocessor modes, the PDi registers for the pins functioning as bus control pins
(A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA, and BCLK) cannot
be modified.
Figure 21.9 and Figure 21.11 shows the PURi Registers.
The PUR0 to PUR2 register bits can be used to select whether or not to pull the corresponding port high in 4 bit
units. The port chosen to be pulled high has a pull-up resistor connected to it when the direction bit is set for input
mode. To use ports P11 to P14, set the PU37 bit in the PUR3 register to “1”.
However, the pull-up control register has no effect on P0 to P3, P4_0 to P4_3, and P5 during memory extension and
microprocessor modes. Although the register contents can be modified, no pull-up resistors are connected.
Figure 21.12 shows the PCR Register.
When the P1 register is read after setting the PCR0 bit in the PCR register to “1”, the corresponding port latch can
be read no matter how the PD1 register is set.
Port Pi Direction Register (PDi Register, i = 0 to 13)
Port Pi Register (Pi Register, i = 0 to 13)
Pull-up Control Register 0 to Pull-up Control Register 3 (PUR0 to PUR3
Registers)
Port Control Register (PCR Register)
Jan 10, 2006
Page 256 of 390
21. Programmable I/O Ports