M30626SPGP#U3C Renesas Electronics America, M30626SPGP#U3C Datasheet - Page 401

• Manufacturer Part Number: M30626SPGP#U3C
• Description: IC M16C/62P MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626SPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Table 25.2
√ : Applies
− : Dose not apply
When supplying power to the microcomputer, the power supply
voltage applied to the VCC1 pin must meet the conditions of
SVCC.
Do not set the CM10 bit in the CM1 register to 1 (stop mode) with
setting the VC13 bit in the VCR1 register to 1 (VCC1 ≥ Vdet 4)
when a low voltage detection interrupt in the voltage detection
circuit is used under the following settings:
• the VC27 bit in the VCR2 register to 1 (low voltage detection
• the D40 bit in the D4INT register to 1 (low voltage detection
• the D41 bit to 1 (use low voltage detection interrupt to exit stop
Do not generate the NMI interrupt after setting the CM10 bit in the
CM1 register to “1” (stop mode) and entering stop mode.
Do not set the CM10 bit in the CM1 register to “1” (stop mode)
when the microcomputer is in low-speed mode under the
following settings:
• the CM04 bit in the CM0 register is set to “1” (sub clock
• the CM07 bit in the CM0 register is set to “1” (sub clock)
When using the sub clock (XCIN-XCOUT) as the CPU clock
(BCLK) or as the timer count source, DO NOT leave the CM03
bit set to “1” (XCINXCOUT drive capacity “HIGH” ).
circuit enabled)
interrupt enabled)
mode)
oscillation)
Jan 10, 2006
Technical Update Applicable Table of M16C/62P Flash and ROM External Versions (2)
Page 384 of 390
Precaution
25. Differences Depending on Manufacturing Period
Chip Version
A
÷
÷
÷
÷
÷
B
÷
-
-
-
-
C
-
-
-
-
-
TECHNICAL
TN-M16C-116-0311
TN-M16C-107-0309
TN-M16C-107-0309
TN-M16C-107-0309
TN-M16C-119A/EA
Precaution 1.1
Precaution 1.2
Precaution 1.3
UPDATE