M30626SPGP#U3C Renesas Electronics America, M30626SPGP#U3C Datasheet - Page 412

• Manufacturer Part Number: M30626SPGP#U3C
• Description: IC M16C/62P MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626SPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev.
REVISION HISTORY
Date
154,162,
93-94 Notes are deleted. (All notes are indicated in “M16C/62 GROUP (M16C/
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Explanation of “Low power Dissipation Mode” is partly revised.
Explanation of “Entering Wait mode” is partly revised.
Explanation of “(3) Stop Mode” is partly revised.
Note 9 is added.
Table 1.9.7 is revised.
Figure 1.11.1 is revised.
Note 6 is added.
Note 2 is added to Figure 1.11.4.
Table 1.11.5 is partly revised.
Figure 1.11.6 is partly revised.
Figure 1.11.8 is partly revised.
Notes 1 to 2 is added to IFSR register of Figure 1.11.4.
Explanation of “Address Match Interrupt” is partly revised.
Figure 1. 11.12 is changed into Table 1.11.6.
62P) USAGE NOTES”).
Explanation of “Watchdog Timer” is partly revised.
A formula is added.
Explanation of “Channel Priority Transfer Timing” is partly revised.
TRGSR register of Figure 1.14.6 is partly revised.
Table 1.14.4 is partly revised.
Figure 1.14.12 is partly revised.
Figure 1.16.2 is partly revised.
Figure 1.16.3 is partly revised.
U0SMR to U2SMR of Figure 1.17.6 is partly revised.
U0SMR2 to U2SMR2 of Figure 1.17.7 is partly revised.
“ − ” of UiBRG of Tables 1.19.2, 1.20.2 and 1.20.8 is changed into “0 to 7”.
Figure 1.20.1 is partly revised.
Table 1.20.4 is partly revised. Notes 5 to 7 is added.
Explanation of “Output of Start and Stop Condition” is partly revised.
Note 2 is added to Table 1.20.9.
“ − ” of U2BRG of Table 1.20.10 is changed into “0 to 7”.
Figure 1.20.10 is revised.
Note of SiC register of Figure 1.21.2 is partly revised.
Note 2 of Table 1.22.1 is revised.
Figure 1.22.1 is partly revised.
Table of ADCON2 register of Figure 1.22.3 is partly revised.
The value of a capacitor of Figure 1.22.10 is changed.
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
C - 5
Description
Summary