M30626SPGP#U3C Renesas Electronics America, M30626SPGP#U3C Datasheet - Page 418

• Manufacturer Part Number: M30626SPGP#U3C
• Description: IC M16C/62P MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626SPGP#U3C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev.
REVISION HISTORY
Date
15-17 Tables 1.10 to 1.12 Pin Characteristics for 128-Pin Package are added.
18-19 Figure 1.7 and 1.8 Pin Configuration (Top View) are partly revised.
20-21 Tables 1.13 to 1.14 Pin Characteristics for 100-Pin Package are added.
23-24 Tables 1.15 to 1.16 Pin Characteristics for 80-Pin Package are added.
25-29 Tables 1.17 to 1.21 are partly revised.
40-44 Change sections in Chapter 5.
52-53 6.4 Cold Start-up / Warm Start-up Determine Function is added.
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Figure 1.6 Pin Configuration (Top View) is partly revised.
Figure 1.9 Pin Configuration (Top View) is partly revised.
Note 4 of Table 4.1 SFR Information is partly revised.
5.2 Brown-out Detection Reset (Hardware Reset 2) is partly revised.
6. Voltage Detection Circuit is partly revised.
Figure 6.1 Voltage Detection Circuit Block is partly revised.
Figure 6.4 Typical Operation of Brown-out Detection Reset (Hardware
Reset 2) is partly revised.
Table 6.2 Sampling Periods is partly revised.
Note 7 of Figure 7.2 PM1 Register is partly revised.
8.2.6 RDY Signal is partly revised.
Table 8.8 Bit and Bus Cycle Related to Software
Figure 9.8 Relationship Between Address on 4-Mbyte ROM and Those on
Microcomputer (2) is partly revised.
Figure 10.7 Examples of Main Clock Connection Circuit is partly revised.
Figure 10.8 Examples of Sub Clock Connection Circuit is partly revised.
10.1.4 PLL Clock is partly revised.
10.4.1.6 On-chip Oscillator Mode is partly revised.
10.4.1.7 On-chip Oscillator Low Power Dissipation Mode is partly revised.
Table 10.4 Pin Status During Wait Mode is partly revised.
10.4.2.4 Exiting Wait Mode is partly revised.
10.4.3 Stop Mode is partly revised.
Table 10.6 Interrupts to Stop Mode and Use Conditions is added.
10.4.3.3 Exiting Stop Mode is partly revised.
Figure 10.11 State Transition in Normal Operating Mode is partly revised.
10.6.3 How to Use Oscillation Stop and Re-oscillation Detect Function is
partly revised.
12.2.2 Overflow Interrupt is partly revised.
12.5.8 Returning from an Interrupt Routine is partly revised.
12.5.9 Interrupt Priority is partly revised.
12.5.10 Interrupt Priority Level Select Circuit is partly revised.
Figure 12.11 IFSR and IFSR2A Registers (Interrupt Factor Select
Register) is partly revised.
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
C - 11
Description
Summary