HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 227

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
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Part Number:
HD64F2612FA20V
Manufacturer:
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2.2.59 (2)
SHLL (SHift Logical Left)
Operation
Rd (left logical shift)
Assembly-Language Format
SHLL.B #2, Rd
Operand Size
Byte
Description
This instruction shifts the bits in an 8-bit register Rd (destination operand) two bits to the left. Bit
6 shifts into the carry flag. Bits 0 and 1 are cleared to 0.
Available Registers
Rd: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Notes
The SHLL instruction differs from the SHAL instruction in its effect on the overflow flag.
Register direct
Addressing
Mode
SHLL (B)
Mnemonic
SHLL.B
C
Rd
MSB
Operands
b7
#2, Rd
b6
1st byte
1
. . . .
0
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 6.
2nd byte
4
Instruction Format
cleared to 0.
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 211 of 322
I
rd
UI H
b1
0
Section 2 Instruction Descriptions
3rd byte
LSB
b0
0
U
N
0
4th byte
REJ09B0139-0400
Z
Shift Logical
V
0
States
No. of
C
1

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