MC68HC711E9MFNE2 Freescale Semiconductor, MC68HC711E9MFNE2 Datasheet - Page 115

IC MCU 8BIT 512BYTES ROM 52-PLCC

MC68HC711E9MFNE2

Manufacturer Part Number
MC68HC711E9MFNE2
Description
IC MCU 8BIT 512BYTES ROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC711E9MFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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SCR[2:0] — SCI Baud Rate Select Bits
Freescale Semiconductor
Selects receiver and transmitter bit rate based on output from baud rate prescaler stage. Refer to
Figure 7-8
The prescaler bits, SCP[2:0], determine the highest baud rate, and the SCR[2:0] bits select an
additional binary submultiple (÷1, ÷2, ÷4, through ÷128) of this highest baud rate. The result of these
two dividers in series is the 16X receiver baud rate clock. The SCR[2:0] bits are not affected by reset
and can be changed at any time, although they should not be changed when any SCI transfer is in
progress.
Figure 7-8
the highest baud rate. The rate select bits determine additional divide by two stages to arrive at the
receiver timing (RT) clock rate. The baud rate clock is the result of dividing the RT clock by 16.
and
and
Figure 7-9
Figure
XTAL
EXTAL
Figure 7-8. SCI Baud Rate Generator Block Diagram
7-9.
CLOCK GENERATOR
illustrate the SCI baud rate timing chain. The prescaler select bits determine
OSCILLATOR
AND
(÷4)
M68HC11E Family Data Sheet, Rev. 5.1
AS
E
÷
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
2
0:0
SCR[2:0]
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
÷
3
INTERNAL BUS CLOCK (PH2)
0:1
÷
4
1:0
BAUD RATE
BAUD RATE
TRANSMIT
RECEIVE
÷
(16X)
÷
(1X)
SCI
SCI
13
16
1:1
SCP[1:0]
SCI Registers
115

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