MC68HC711E9MFNE2 Freescale Semiconductor, MC68HC711E9MFNE2 Datasheet - Page 96

• Manufacturer Part Number: MC68HC711E9MFNE2
• Description: IC MCU 8BIT 512BYTES ROM 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9MFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Resets and Interrupts
masked), the MCU starts up, beginning with the stacking sequence leading to normal service of the XIRQ
request. If X is set to 1 (XIRQ masked or inhibited), then processing continues with the instruction that
immediately follows the STOP instruction, and no XIRQ interrupt service is requested or pending.
Because the oscillator is stopped in stop mode, a restart delay may be imposed to allow oscillator
stabilization upon leaving stop. If the internal oscillator is being used, this delay is required; however, if a
stable external oscillator is being used, the DLY control bit can be used to bypass this startup delay. The
DLY control bit is set by reset and can be optionally cleared during initialization. If the DLY equal to 0
option is used to avoid startup delay on recovery from stop, then reset should not be used as the means
of recovering from stop, as this causes DLY to be set again by reset, imposing the restart delay. This same
delay also applies to power-on reset, regardless of the state of the DLY control bit, but does not apply to
a reset while the clocks are running.
M68HC11E Family Data Sheet, Rev. 5.1
96
Freescale Semiconductor