MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 17

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M68HC11E Family — Rev. 3.2
MOTOROLA
Technical Data — M68HC11E Family
Figure
1-1
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
3-1
3-2
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
M68HC11 E-Series Block Diagram . . . . . . . . . . . . . . . . . . . . 26
Pin Assignments for 52-Pin PLCC and CLCC . . . . . . . . . . . . 28
Pin Assignments for 64-Pin QFP . . . . . . . . . . . . . . . . . . . . . . 29
Pin Assignments for 52-Pin TQFP . . . . . . . . . . . . . . . . . . . . . 30
Pin Assignments for 56-Pin SDIP. . . . . . . . . . . . . . . . . . . . . . 31
Pin Assignments for 48-Pin DIP (MC68HC811E2). . . . . . . . . 32
External Reset Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
External Reset Circuit with Delay . . . . . . . . . . . . . . . . . . . . . . 33
Common Parallel Resonant Crystal Connections . . . . . . . . . 35
External Oscillator Connections . . . . . . . . . . . . . . . . . . . . . . . 35
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Stacking Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Address/Data Demultiplexing . . . . . . . . . . . . . . . . . . . . . . . . . 68
Memory Map for MC68HC11E0 . . . . . . . . . . . . . . . . . . . . . . . 70
Memory Map for MC68HC11E1 . . . . . . . . . . . . . . . . . . . . . . . 70
Memory Map for MC68HC(7)11E9. . . . . . . . . . . . . . . . . . . . . 71
Memory Map for MC68HC(7)11E20. . . . . . . . . . . . . . . . . . . .71
Memory Map for MC68HC811E2 . . . . . . . . . . . . . . . . . . . . . . 72
Register and Control Bit Assignments . . . . . . . . . . . . . . . . . . 72
RAM Standby MODB/V
Highest Priority I-Bit Interrupt and Miscellaneous
System Configuration Register (CONFIG) . . . . . . . . . . . . . . .87
MC68HC811E2 System Configuration
RAM and I/O Mapping Register (INIT) . . . . . . . . . . . . . . . . . . 89
Register (HPRIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Register (CONFIG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
List of Figures
Title
STBY
Connections . . . . . . . . . . . . . . . 81
List of Figures
Technical Data
Page
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