MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 180

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing System
9.3 Timer Structure
Technical Data
180
Figure 9-2
port A pin control block includes logic for timer functions and for
general-purpose I/O. For pins PA3, PA2, PA1, and PA0, this block
contains both the edge-detection logic and the control logic that enables
the selection of which edge triggers an input capture. The digital level on
PA[3:0] can be read at any time (read PORTA register), even if the pin
is being used for the input capture function. Pins PA[6:3] are used for
either general-purpose I/O, or as output compare pins. When one of
these pins is being used for an output compare function, it cannot be
written directly as if it were a general-purpose output. Each of the output
compare functions (OC[5:2]) is related to one of the port A output pins.
Output compare one (OC1) has extra control logic, allowing it optional
control of any combination of the PA[7:3] pins. The PA7 pin can be used
as a general-purpose I/O pin, as an input to the pulse accumulator, or as
an OC1 output pin.
Control Bits
overflow —
overflow —
overflow —
overflow —
1 count —
1 count —
1 count —
1 count —
PR1, PR0
0 0
0 1
1 0
1 1
shows the capture/compare system block diagram. The
65.536 ms
262.14 ms
524.29 ms
Timing System
4.0 MHz
1.0 MHz
1000 ns
1000 ns
16.0 s
1.049 s
4.0 s
8.0 s
Table 9-1. Timer Summary
32.768 ms
131.07 ms
262.14 ms
524.29 ms
Main Timer Count Rates
8.0 MHz
2.0 MHz
500 ns
500 ns
2.0 s
4.0 s
8.0 s
XTAL Frequencies
21.845 ms
87.381 ms
174.76 ms
349.52 ms
M68HC11E Family — Rev. 3.2
12.0 MHz
3.0 MHz
1.333 s
2.667 s
5.333 s
333 ns
333 ns
Other Rates
MOTOROLA
(E/2
(E/2
(E/2
(E/2
(E/16)
(1/E)
(E/1)
(E/4)
(E/8)
(E)
16
18
19
20
)
)
)
)