MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 196

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing System
9.5.8 Timer Interrupt Flag 1 Register
9.5.9 Timer Interrupt Mask 2 Register
Technical Data
196
Address:
Address:
Bits in this register indicate when timer system events have occurred.
Coupled with the bits of TMSK1, the bits of TFLG1 allow the timer
subsystem to operate in either a polled or interrupt driven system. Each
bit of TFLG1 corresponds to a bit in TMSK1 in the same position.
Clear flags by writing a 1 to the corresponding bit position(s).
OC1F–OC4F — Output Compare x Flag
I4/O5F — Input Capture 4/Output Compare 5 Flag
IC1F–IC3F — Input Capture x Flag
Use this 8-bit register to enable or inhibit timer overflow and real-time
interrupts. The timer prescaler control bits are included in this register.
Reset:
Reset:
Read:
Read:
Write:
Write:
Set each time the counter matches output compare x value
Set by IC4 or OC5, depending on the function enabled by I4/O5 bit in
PACTL
Set each time a selected active edge is detected on the ICx input line
Figure 9-19. Timer Interrupt Mask 2 Register (TMSK2)
Figure 9-18. Timer Interrupt Flag 1 Register (TFLG1)
$1023
OC1F
$1024
Bit 7
Bit 7
TOI
0
0
= Unimplemented
OC2F
RTII
Timing System
6
0
6
0
PAOVI
OC3F
5
0
5
0
OC4F
PAII
4
0
4
0
I4/O5F
3
0
3
0
M68HC11E Family — Rev. 3.2
IC1F
2
0
2
0
IC2F
PR1
1
0
1
0
MOTOROLA
IC3F
Bit 0
Bit 0
PR0
0
0