MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 50

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Central Processor Unit (CPU)
3.3.5 Program Counter (PC)
Technical Data
50
When an interrupt is recognized, the current instruction finishes
normally, the return address (the current value in the program counter)
is pushed onto the stack, all of the CPU registers are pushed onto the
stack, and execution continues at the address specified by the vector for
the interrupt.
At the end of the interrupt service routine, an return-from interrupt (RTI)
instruction is executed. The RTI instruction causes the saved registers
to be pulled off the stack in reverse order. Program execution resumes
at the return address.
Certain instructions push and pull the A and B accumulators and the X
and Y index registers and are often used to preserve program context.
For example, pushing accumulator A onto the stack when entering a
subroutine that uses accumulator A and then pulling accumulator A off
the stack just before leaving the subroutine ensures that the contents of
a register will be the same after returning from the subroutine as it was
before starting the subroutine.
The program counter, a 16-bit register, contains the address of the next
instruction to be executed. After reset, the program counter is initialized
from one of six possible vectors, depending on operating mode and the
cause of reset. See
Test or Boot
Normal
Mode
Central Processor Unit (CPU)
POR or RESET Pin
Table 3-1. Reset Vector Comparison
Table
$FFFE, F
$BFFE, F
3-1.
Clock Monitor
$BFFC, D
$FFFC, D
M68HC11E Family — Rev. 3.2
COP Watchdog
$BFFA, B
$FFFA, B
MOTOROLA

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