MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 56

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Central Processor Unit (CPU)
3.6.6 Relative
3.7 Instruction Set
Technical Data
56
The relative addressing mode is used only for branch instructions. If the
branch condition is true, an 8-bit signed offset included in the instruction
is added to the contents of the program counter to form the effective
branch address. Otherwise, control proceeds to the next instruction.
These are usually 2-byte instructions.
Refer to
possible addressing modes. For each instruction, the table shows the
operand construction, the number of machine code bytes, and execution
time in CPU E-clock cycles.
Table
Central Processor Unit (CPU)
3-2, which shows all the M68HC11 instructions in all
M68HC11E Family — Rev. 3.2
MOTOROLA

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