MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 59

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M68HC11E Family — Rev. 3.2
MOTOROLA
CMPB (opr)
EORA (opr)
EORB (opr)
Mnemonic
COM (opr)
CPD (opr)
CPX (opr)
CPY (opr)
DEC (opr)
INC (opr)
COMA
COMB
DECA
DECB
INCA
FDIV
DAA
DES
DEX
DEY
IDIV
Exclusive OR A
Exclusive OR B
Divide 16 by 16
Decimal Adjust
Memory 16-Bit
Memory 16-Bit
Memory 16-Bit
Index Register
Index Register
Compare B to
Compare D to
Compare X to
Compare Y to
Integer Divide
Memory Byte
Memory Byte
Stack Pointer
Memory Byte
Complement
Complement
Complement
with Memory
with Memory
Accumulator
Accumulator
Accumulator
Decrement
Decrement
Decrement
Decrement
Decrement
Decrement
Operation
Increment
Fractional
Increment
16 by 16
Memory
Ones
Ones
Ones
A
B
A
A
B
X
Y
A
Adjust Sum to BCD
D / IX
D / IX
D – M : M + 1
IX – M : M + 1
IY – M : M + 1
$FF – M
$FF – A
$FF – B
SP – 1
Description
IX – 1
IY – 1
A
B
M + 1
M – 1
A – 1
B – 1
A + 1
B – M
M
M
Table 3-2. Instruction Set (Sheet 3 of 7)
IX; r
IX; r
M
A
B
SP
IX
IY
M
A
A
B
M
A
B
D
D
B
B
B
B
B
A
B
A
B
A
A
A
A
A
B
B
B
B
B
A
Central Processor Unit (CPU)
Addressing
Mode
IMM
DIR
EXT
IND,X
IND,Y
EXT
IND,X
IND,Y
INH
INH
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
INH
EXT
IND,X
IND,Y
INH
INH
INH
INH
INH
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
INH
INH
EXT
IND,X
IND,Y
INH
18
18
1A
1A
1A
1A
CD
CD
18
18
18
1A
18
18
18
18
18
18
Opcode
C1
D1
E1
E1
73
63
63
43
53
83
93
B3
A3
A3
8C
9C
AC
AC
8C
9C
BC
AC
AC
19
7A
6A
6A
4A
5A
34
09
09
88
98
A8
A8
C8
D8
E8
E8
03
02
7C
6C
6C
4C
F1
BC
B8
F8
Instruction
ii
dd
hh ll
ff
ff
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
hh ll
ff
ff
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
hh ll
ff
ff
Operand
—
—
—
—
—
—
—
—
—
—
—
Cycles
41
41
2
3
4
4
5
6
6
7
2
2
5
6
7
7
7
4
5
6
6
7
5
6
7
7
7
2
6
6
7
2
2
3
3
4
2
3
4
4
5
2
3
4
4
5
6
6
7
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
S
Central Processor Unit (CPU)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
X
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
H
Condition Codes
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I
—
—
—
—
—
N
Technical Data
Instruction Set
—
Z
—
—
—
V
0
0
0
0
0
0
—
—
—
—
—
—
—
—
—
—
C
1
1
1
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