MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 82

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711E9CFNE2
Manufacturer:
TE
Quantity:
12 000
Part Number:
MC68HC711E9CFNE2
Manufacturer:
FREESCAL
Quantity:
5 530
Part Number:
MC68HC711E9CFNE2
Manufacturer:
FREESCALE
Quantity:
1 133
Operating Modes and On-Chip Memory
4.4.2 Mode Selection
Technical Data
82
The four mode variations are selected by the logic states of the MODA
and MODB pins during reset. The MODA and MODB logic levels
determine the logic state of SMOD and the MDA control bits in the
highest priority I-bit interrupt and miscellaneous (HPRIO) register.
After reset is released, the mode select pins no longer influence the
MCU operating mode. In single-chip operating mode, the MODA pin is
connected to a logic level 0. In expanded mode, MODA is normally
connected to V
also functions as the load instruction register LIR pin when the MCU is
not in reset. The open-drain active low LIR output pin drives low during
the first E cycle of each instruction. The MODB pin also functions as
standby power input (V
maintained in absence of V
Refer to
control bits, and the four operating modes.
A normal mode is selected when MODB is logic 1 during reset. One of
three reset vectors is fetched from address $FFFA–$FFFF, and program
execution begins from the address indicated by this vector. If MODB is
logic 0 during reset, the special mode reset vector is fetched from
addresses $BFFA–$BFFF, and software has access to special test
features. Refer to
MODB
1
1
0
0
Input Levels
Operating Modes and On-Chip Memory
at Reset
Table
Table 4-1. Hardware Mode Select Summary
MODA
4-1, which is a summary of mode pin operation, the mode
DD
0
1
0
1
Section 5. Resets and
through a pullup resistor of 4.7 k . The MODA pin
STBY
Special test
Single chip
Expanded
Bootstrap
DD
Mode
), which allows RAM contents to be
.
RBOOT
Interrupts.
0
0
1
0
Control Bits in HPRIO
M68HC11E Family — Rev. 3.2
(Latched at Reset)
SMOD
0
0
1
1
MOTOROLA
MDA
0
1
0
1

Related parts for MC68HC711E9CFNE2