HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 1424

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Register
TIOR1—Timer I/O Control Register 1
Page 1374 of 1458
Bit
Initial value
Read/Write
TGR1B I/O Control
0
1
0
1
0
1
0
*
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
*
*
IOB3
R/W
TGR1B is
output
compare
register
TGR1B is
input
capture
register
7
0
TGR1A I/O Control
0
1
IOB2
R/W
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCB1 pin
Capture input
source is TGR0C
compare match/
input capture
6
0
0
1
0
1
0
*
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
*
*
IOB1
R/W
TGR1A is
output
compare
register
TGR1A is
input
capture
register
5
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation of TGR0C
compare match/input capture
IOB0
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCA1 pin
Capture input
source is TGR0A
compare match/
input capture
R/W
4
0
H'FF22
IOA3
R/W
3
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation of
channel 0/TGR0A compare match/
input capture
*: Don't care
IOA2
R/W
2
0
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
IOA1
R/W
1
0
*: Don't care
IOA0
May 28, 2010
R/W
0
0
TPU1