HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 159

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
5.2.2
The IPR registers are twelve 8-bit readable/writable registers that set priorities (levels 7 to 0) for
interrupts other than NMI.
The correspondence between IPR settings and interrupt sources is shown in table 5-3.
The IPR registers set a priority (level 7 to 0) for each interrupt source other than NMI.
The IPR registers are initialized to H'77 by a reset and in hardware standby mode.
Bits 7 and 3—Reserved: These bits are always read as 0 and cannot be modified.
Table 5-3
Register
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
IPRJ
IPRK
IPRL
IPRM
Notes: 1. Reserved. These bits are always read as 1 and cannot be modified.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value
R/W
2. I
3. The PC break, DTC, and HCAN channel 1 are reserved in the H8S/2635 Group.
Interrupt Priority Registers A to H, J to M (IPRA to IPRH, IPRJ to IPRM)
The IIC bit becomes reserved bit when this optional feature is not used.
2
C bus interface is available as an option in the H8S/2638, H8S/2639, and H8S/2630.
Correspondence between Interrupt Sources and IPR Settings
:
:
:
⎯
⎯
7
0
IPR6
R/W
6 to 4
IRQ0
IRQ2
IRQ3
— *
Watchdog timer 0
PC break *
TPU channel 0
TPU channel 2
TPU channel 4
— *
SCI channel 1
— *
PWM channel 1, 2
HCAN channel 1 *
6
1
1
1
1
IPR5
R/W
3
5
1
3
IPR4
R/W
4
1
⎯
⎯
3
0
Bits
2 to 0
IRQ1
IRQ4
IRQ5
DTC *
— *
A/D converter, watchdog timer 1
TPU channel 1
TPU channel 3
TPU channel 5
SCI channel 0
SCI channel 2
IIC (Option) *
HCAN channel 0
1
IPR2
R/W
3
2
1
Section 5 Interrupt Controller
2
IPR1
R/W
1
1
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IPR0
R/W
0
1