HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 170

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 5 Interrupt Controller
PWM1
PWM2
ERS0, OVR0, RM1, SLE0,
RM0
ERS0, OVR0, RM1, SLE0,
RM0
Reserved for system use
Notes: 1. Lower 16 bits of the start address.
5.4
5.4.1
Interrupt operations in the chip differ depending on the interrupt control mode.
NMI interrupts are accepted at all times except in the reset state and the hardware standby state. In
the case of IRQ interrupts and on-chip supporting module interrupts, an enable bit is provided for
each interrupt. Clearing an enable bit to 0 disables the corresponding interrupt request. Interrupt
sources for which the enable bits are set to 1 are controlled by the interrupt controller.
Table 5-5 shows the interrupt control modes.
The interrupt controller performs interrupt control according to the interrupt control mode set by
the INTM1 and INTM0 bits in SYSCR, the priorities set in IPR, and the masking state indicated
by the I bit in the CPU’s CCR, and bits I2 to I0 in EXR.
Page 120 of 1458
Interrupt Source
2. I
3. The DTC, PC break, and HCAN1 interrupts are reserved in the H8S/2635 Group.
Interrupt Operation
Interrupt Control Modes and Interrupt Operation
product equipped with the I
2
C is available as an option in the H8S/2638, H8S/2639, and H8S/2630 only. The
PWM
channel 1
PWM
channel 2
HCAN1 *
HCAN0
—
Origin of
Interrupt
Source
2
C bus interface is the W-mask version.
3
110
Vector
Number
104
105
106
107
108
109
111
H'01A0
H'01A4
H'01A8
H'01AC
H'01B0
H'01B4
H'01B8
H'01BC
Vector
Address *
Advanced
Mode
1
H8S/2639, H8S/2638, H8S/2636,
IPRM6 to 4
IPRM2 to 0
IPR
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
May 28, 2010
High
Low
Priority