HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 339

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores output data for the port E pins (PE7 to PE0).
PEDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port E Register (PORTE)
Note: * Determined by state of pins PE7 to PE0.
PORTE is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port E pins (PE7 to PE0) must always be performed on PEDR.
If a port E read is performed while PEDDR bits are set to 1, the PEDR values are read. If a port E
read is performed while PEDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTE contents are determined by the pin states, as
PEDDR and PEDR are initialized. PORTE retains its prior state in software standby mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
PE7DR
R/W
PE7
— *
R
7
0
7
PE6DR
R/W
PE6
— *
R
6
0
6
PE5DR
R/W
PE5
— *
R
5
0
5
PE4DR
R/W
PE4
— *
R
4
0
4
PE3DR
R/W
PE3
— *
R
3
0
3
PE2DR
R/W
PE2
— *
R
2
0
2
PE1DR
R/W
PE1
— *
R
1
0
1
Section 9 I/O Ports
Page 289 of 1458
PE0DR
R/W
PE0
— *
R
0
0
0