HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 475

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
12.1
The chip has two channel inbuilt watchdog timers (WDT0/WDT1). The WDT can also generate
an internal reset signal for the chip if a system crash prevents the CPU from writing to the timer
counter, allowing it to overflow.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer operation, an interval timer interrupt is generated each time the counter overflows.
12.1.1
WDT features are listed below.
• Switchable between watchdog timer mode and interval timer mode
• An internal reset can be issued if the timer counter overflows
• Interrupt generation when in interval timer mode
• WDT0 and WDT1 respectively allow eight and sixteen types *
Notes: 1. Other than the U-mask and W-mask versions, and H8S/2635 Group have eight types of
REJ09B0103-0800 Rev. 8.00
May 28, 2010
⎯ In the watchdog timer mode, the WDT can generate an internal reset
⎯ If the counter overflows, the WDT generates an interval timer interrupt
selected
⎯ The maximum interval of the WDT is given as a system clock cycle × 131072 × 256
⎯ A subclock *
⎯ Where a subclock is selected, the maximum interval is given as a subclock cycle × 256 ×
256
2. Subclock functions (subactive mode, subsleep mode, and watch mode) are available in
Overview
Features
counter input clock as well as WDT0.
the U-mask and W-mask versions, and H8S/2635 Group only.
See section 22A.7, Subclock Oscillator, for the method of fixing pins when OSC1 and
OSC2 are not used. The H8S/2639 and H8S/2635 Groups have no OSC1 and OSC2
pins.
2
may be selected for the input counter of WDT1
Section 12 Watchdog Timer
1
of counter input clock to be
Section 12 Watchdog Timer
Page 425 of 1458