HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 501

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
13.2.3
TSR is a register used to transmit serial data.
To perform serial data transmission, the SCI first transfers transmit data from TDR to TSR, then
sends the data to the TxD pin starting with the LSB (bit 0).
When transmission of one byte is completed, the next transmit data is transferred from TDR to
TSR, and transmission started, automatically. However, data transfer from TDR to TSR is not
performed if the TDRE bit in SSR is set to 1.
TSR cannot be directly read or written to by the CPU.
13.2.4
TDR is an 8-bit register that stores data for serial transmission.
When the SCI detects that TSR is empty, it transfers the transmit data written in TDR to TSR and
starts serial transmission. Continuous serial transmission can be carried out by writing the next
transmit data to TDR during serial transmission of the data in TSR.
TDR can be read or written to by the CPU at all times.
TDR is initialized to H'FF by a reset, in standby mode, watch mode * , subactive mode * , and
subsleep mode * or module stop mode.
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value
R/W
Bit
R/W
U-mask and W-mask versions, and H8S/2635 Group only.
These functions cannot be used with the other versions.
Transmit Data Register (TDR)
Transmit Shift Register (TSR)
:
:
:
:
:
7
R/W
7
1
6
R/W
6
1
5
R/W
5
1
4
R/W
4
1
3
R/W
Section 13 Serial Communication Interface (SCI)
3
1
2
R/W
2
1
1
R/W
1
1
Page 451 of 1458
0
R/W
0
1

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