HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 513

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
13.2.8
BRR is an 8-bit register that sets the serial transfer bit rate in accordance with the baud rate
generator operating clock selected by bits CKS1 and CKS0 in SMR.
BRR can be read or written to by the CPU at all times.
BRR is initialized to H'FF by a reset and in standby mode.
As baud rate generator control is performed independently for each channel, different values can
be set for each channel.
Table 13-3 shows sample BRR settings in asynchronous mode, and table 13-4 shows sample BRR
settings in clocked synchronous mode.
Table 13-3 BRR Settings for Various Bit Rates (Asynchronous Mode)
Bit Rate
(bit/s)
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value
R/W
Bit Rate Register (BRR)
:
:
:
n
2
1
1
0
0
0
0
0
0
R/W
φ = 4 MHz
7
1
N
70
207
103
207
103
51
25
12
3
Error
(%)
0.03
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
R/W
6
1
n
2
1
1
0
0
0
0
0
0
0
0
φ = 4.9152 MHz
R/W
5
1
7
3
N
86
255
127
255
127
63
31
15
4
Error
(%)
0.31
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
–1.70 0
0.00
R/W
4
1
n
2
2
1
1
0
0
0
0
0
0
R/W
Section 13 Serial Communication Interface (SCI)
3
1
φ = 5 MHz
N
88
64
129
64
129
64
32
15
7
4
3
R/W
Error
(%)
–0.25
0.16
0.16
0.16
0.16
0.16
–1.36
1.73
1.73
0.00
1.73
2
1
R/W
1
1
Page 463 of 1458
R/W
0
1

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