HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 627

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Table 15-4 I
Legend
S
SLA
R/W
A
DATA
P
REJ09B0103-0800 Rev. 8.00
May 28, 2010
SDA
SCL
S
FS = 1 and FSX = 1
Start condition. The master device drives SDA from high to low while SCL is high
Slave address, by which the master device selects a slave device
Indicates the direction of data transfer: from the slave device to the master device
when R/W is 1, or from the master device to the slave device when R/W is 0
Acknowledge. The receiving device (the slave in master transmit mode, or the master
in master receive mode) drives SDA low to acknowledge a transfer
Transferred data. The bit length is set by bits BC2 to BC0 in ICMR. The MSB-first or
LSB-first format is selected by bit MLS in ICMR
Stop condition. The master device drives SDA from low to high while SCL is high
S
1
2
C Bus Data Format Symbols
SLA
1-7
DATA
Figure 15-4 I
8
1
R/W
8
9
A
Figure 15-5 I
DATA
n
2
C Bus Data Format (Serial Format)
m
1-7
DATA
2
C Bus Timing
8
A
9
P
1
(Only for the H8S/2638, H8S/2639, and H8S/2630)
m: transfer frame count
(m ≥ 1)
n: transfer bit count
(n = 1 to 8)
1-7
Section 15 I
DATA
8
2
C Bus Interface [Option]
A/A
9
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