HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 632

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
Section 15 I
(Only for the H8S/2638, H8S/2639, and H8S/2630)
15.3.4
In I
and returns an acknowledge signal. The slave device transmits data.
The master device transmits the data containing the slave address + R/W (0: read) in the 1st frame
after a start condition is generated in the master transmit mode. After the slave device is selected
the switch to receive operation takes place.
(1) Receive Operation Using Wait States
Figures 15-10 and 15-11 are flowcharts showing examples of the master receive mode (WAIT =
1).
Page 582 of 1458
SCL
(Master output)
SDA
(Master output)
SDA
(Slave output)
ICDRE
IRIC
IRTR
ICDR
User processing
2
C bus format master receive mode, the master device outputs the receive clock, receives data,
Figure 15-9 Example of Master Transmit Mode Stop Condition Generation Timing
Master Receive Operation
2
C Bus Interface [Option]
Data 1
Bit 0
8
Data 1
[7]
[9] ICDR write
A
9
Bit 7
1
Bit 6
(MLS = WAIT = 0)
2
[9] IRIC clearance
Bit 5
3
Data 2
Bit 4 Bit 3
4
Data 2
5
Bit 2
6
Bit 1 Bit 0
7
[11] ACKB read
8
[12] IRIC clearance
[10]
A
9
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
[12] Write BBSY = 0
Generate start
condition
and SCP = 0
(generate stop
condition)
May 28, 2010

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