HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 677

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
16.2.7
The transmit acknowledge register (TXACK) is a 16-bit readable/writable register containing
status flags that indicate normal transmission of mailbox (buffer) transmit messages.
Note: * Only a write of 1 is permitted, to clear the flag.
Bits 15 to 9 and 7 to 0—Transmit Acknowledge Register (TXACK7 to TXACK1, TXACK15
to TXACK8): These bits indicate that a transmit message in the corresponding HCAN mailbox
has been transmitted normally.
Bit y: TXACKx
0
1
Bit 8—Reserved: This bit always reads 0. The write value should always be 0.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Initial value:
Initial value:
TXACK
Transmit Acknowledge Register (TXACK)
R/W:
R/W:
Bit:
Bit:
TXACK15 TXACK14 TXACK13 TXACK12 TXACK11 TXACK10 TXACK9
TXACK7
R/(W) *
R/(W) *
[Clearing condition]
•
Completion of message transmission for corresponding mailbox
Description
15
0
7
0
Writing 1
TXACK6
R/(W) *
R/(W) *
14
0
6
0
TXACK5
R/(W) *
R/(W) *
13
0
5
0
TXACK4
R/(W) *
R/(W) *
12
0
4
0
TXACK3
R/(W) *
R/(W) *
11
Section 16 Controller Area Network (HCAN)
0
3
0
(x = 15 to 1, y = 15 to 9 and 7 to 0)
TXACK2
R/(W) *
R/(W) *
10
0
2
0
TXACK1
R/(W) *
R/(W) *
9
0
1
0
(Initial value)
Page 627 of 1458
TXACK8
R/(W) *
—
R
8
0
0
0