HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 683

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bit 11—Transmit Overload Warning Interrupt Flag (IRR3): Status flag indicating the error
warning state caused by the transmit error counter.
Bit 11: IRR3
0
1
Bit 10—Remote Frame Request Interrupt Flag (IRR2): Status flag indicating that a remote
frame has been received in a mailbox (buffer).
Bit 10: IRR2
0
1
Bit 9—Receive Message Interrupt Flag (IRR1): Status flag indicating that a mailbox (buffer)
receive message has been received normally.
Bit 9: IRR1
0
1
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Description
[Clearing condition]
Error warning state caused by transmit error
[Setting condition]
Description
[Clearing condition]
Remote frame received and stored in mailbox
[Setting condition]
Description
[Clearing condition]
Data frame or remote frame received and stored in mailbox
[Setting condition]
Writing 1
When TEC ≥ 96
Clearing of all bits in RFPR (remote request register) of mailbox for
which receive interrupt requests are enabled by MBIMR
When remote frame reception is completed, when corresponding
MBIMR = 0
Clearing of all bits in RXPR (receive complete register) of mailbox for
which receive interrupt requests are enabled by MBIMR
When data frame or remote frame reception is completed, when
corresponding MBIMR = 0
Section 16 Controller Area Network (HCAN)
(Initial value)
(Initial value)
(Initial value)
Page 633 of 1458

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