HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 761

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
18.3
The D/A converter module has one on-chip D/A converter circuits that can operate independently.
D/A conversion is performed continuously whenever enabled by the D/A control register (DACR).
When a new value is written in DADR0 or DADR1, conversion of the new value begins
immediately. The converted result is output by setting the DAOE0 or DAOE1 bit to 1.
An example of conversion on channel 0 is given next. Figure 18-2 shows the timing.
• Software writes the data to be converted in DADR0.
• D/A conversion begins when the DAOE0 bit in DACR is set to 1. After the elapse of the
• If a new value is written in DADR0, conversion begins immediately. Output of the converted
• When the DAOE0 bit is cleared to 0, DA0 becomes an input pin.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
φ
Address
DADR0
DAOE0
DA0
Legend:
t
DCONV
conversion time, analog output appears at the DA0 pin. Contents of DADR / 256 × Vref
This output continues until a new value is written in DADR0 or the DAOE0 bit is cleared to 0.
result begins after the conversion time.
: D/A conversion time
Operation
DADR0
write cycle
High-impedance state
DACR
write cycle
Figure 18-2 D/A Conversion (Example)
Conversion data (1)
t
DCONV
Conversion result (1)
DADR0
write cycle
t
DCONV
Conversion data (2)
Conversion result (2)
Section 18 D/A Converter
Page 711 of 1458
DACR
write cycle