HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 955

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bit 3—Frequency Multiplication Factor Switching Mode Select (STCS): Selects the operation
when the PLL circuit frequency multiplication factor is changed.
Bit 3
STCS
0
1
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
Bits 2 to 0—System Clock Select 2 to 0 (SCK2 to SCK0): These bits select the bus master
clock.
Bit 2
SCK2
0
1
22A.2.2 Low-Power Control Register (LPWRCR)
LPWRCR is an 8-bit readable/writable register that performs power-down mode control. The
following pertains to bits 1 and 0. For details of the other bits, see section 23A.2.3, 23B.2.3, Low
Power Control Register (LPWRCR). LPWRCR is initialized to H'00 by a reset and in hardware
standby mode. It is not initialized in software standby mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value
Read/Write
U-mask and W-mask versions only.
These functions cannot be used with the other versions.
Bit 1
0
1
0
1
SCK1
Description
Specified multiplication factor is valid after transition to software standby mode,
watch mode * , and subactive mode *
Specified multiplication factor is valid immediately after STC bits are rewritten
DTON
R/W
Bit 0
SCK0
0
1
0
1
0
1
—
7
0
LSON
R/W
Description
Bus master is in high-speed mode
Medium-speed clock is φ/2
Medium-speed clock is φ/4
Medium-speed clock is φ/8
Medium-speed clock is φ/16
Medium-speed clock is φ/32
—
6
0
NESEL
R/W
5
0
SUBSTP
R/W
4
0
(H8S/2636 Group, H8S/2638 Group, H8S/2630 Group)
RFCUT
R/W
3
0
R/W
Section 22A Clock Pulse Generator
⎯
2
0
STC1
R/W
1
0
(Initial value)
(Initial value)
Page 905 of 1458
STC0
R/W
0
0