HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 966

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 22B Clock Pulse Generator
(H8S/2639 Group, H8S/2635 Group)
22B.1.2 Register Configuration
The clock pulse generator is controlled by SCKCR and LPWRCR. Table 22B-1 shows the register
configuration.
Table 22B-1 Clock Pulse Generator Register
Name
System clock control register
Low-power control register
Note:* Lower 16 bits of the address.
22B.2 Register Descriptions
22B.2.1 System Clock Control Register (SCKCR)
SCKCR is an 8-bit readable/writable register that performs φ clock output control and medium-
speed mode control, selection of operation when the PLL circuit frequency multiplication factor is
changed, and medium-speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—φ Clock Output Disable (PSTOP): In combination with the DDR of the applicable port,
this bit controls φ output. See section 23B.12, φ Clock Output Disable Function for details.
Bit 7
PSTOP
0
1
Bits 6 to 4—Reserved: These bits are always read as 0 and cannot be modified.
Page 916 of 1458
Bit
Initial value
R/W
Normal Operating
State
φ output (initial value)
Fixed high
:
:
:
PSTOP
R/W
7
0
⎯
⎯
6
0
Abbreviation
SCKCR
LPWRCR
φ output
Fixed high
Sleep Mode
⎯
⎯
5
0
Description
⎯
⎯
4
0
R/W
R/W
R/W
Software
Standby Mode
Fixed high
Fixed high
STCS
R/W
3
0
Initial Value
H'00
H'00
SCK2
R/W
2
0
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
SCK1
Hardware
Standby Mode
High impedance
High impedance
R/W
1
0
H'FDE6
Address*
H'FDEC
SCK0
May 28, 2010
R/W
0
0