UPD78F9212CS-CAB-A Renesas Electronics America, UPD78F9212CS-CAB-A Datasheet - Page 175

no-image

UPD78F9212CS-CAB-A

Manufacturer Part Number
UPD78F9212CS-CAB-A
Description
MCU 8BIT 4KB FLASH 16PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9212CS-CAB-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
9.6
(1) Operating current in STOP mode
(2) Input range of ANI0 to ANI3
(3) Conflicting operations
(4) Noise countermeasures
To satisfy the DC characteristics of the supply current in the STOP mode, clear bit 7 (ADCS) and bit 0 (ADCE) of
the A/D converter mode register (ADM) to 0 before executing the STOP instruction.
Observe the rated range of the ANI0 to ANI3 input voltage. If a voltage of V
the range of absolute maximum ratings) is input to an analog input channel, the converted value of that channel
becomes undefined. In addition, the converted values of the other channels may also be affected.
<1> Conflict between A/D conversion result register (ADCR, ADCRH) write and ADCR, ADCRH read by
<2> Conflict between ADCR, ADCRH write and A/D converter mode register (ADM) write or analog input
To maintain the 10-bit resolution, attention must be paid to noise input to the V
<1> Connect a capacitor with a low equivalent resistance and a high frequency response to the power supply.
<2> Because the effect increases in proportion to the output impedance of the analog input source, it is
<3> Do not switch the A/D conversion function of the ANI0 to ANI3 pins to their alternate functions during
<4> The conversion accuracy can be improved by setting HALT mode immediately after the conversion starts.
Cautions for A/D Converter
Reference
C = 0.01 to 0.1 F
instruction upon the end of conversion
ADCR, ADCRH read has priority. After the read operation, the new conversion result is written to ADCR,
ADCRH.
channel specification register (ADS) write upon the end of conversion
ADM or ADS write has priority. ADCR, ADCRH write is not performed, nor is the conversion end interrupt
signal (INTAD) generated.
recommended that a capacitor be connected externally, as shown in Figure 9-19, to reduce noise.
conversion.
voltage
input
CHAPTER 9 A/D CONVERTER ( PD78F921x ONLY)
Figure 9-19. Analog Input Pin Connection
User’s Manual U16994EJ6V0UD
V
V
ANI0 to ANI3
DD
SS
If there is a possibility that noise equal to or higher than V
equal to or lower than V
small V
F
value (0.3 V or lower).
SS
may enter, clamp with a diode with a
DD
DD
or higher and V
pin and ANI0 to ANI3 pins.
SS
or lower (even in
DD
or
173

Related parts for UPD78F9212CS-CAB-A