UPD78F9212CS-CAB-A Renesas Electronics America, UPD78F9212CS-CAB-A Datasheet - Page 357

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UPD78F9212CS-CAB-A

Manufacturer Part Number
UPD78F9212CS-CAB-A
Description
MCU 8BIT 4KB FLASH 16PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9212CS-CAB-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
2nd edition
Edition
Modification of Table 8-1 Loop Detection Time of Watchdog Timer
Addition of Caution 4 and modification to Figure 8-2 Format of Watchdog Timer Mode
Register (WDTM)
Modification of Figure 8-4 Status Transition Diagram When “Low-Speed Internal
Oscillator Cannot Be Stopped” Is Selected by Option Byte
Modification of Figure 8-5 Status Transition Diagram When “Low-Speed Internal
Oscillator Can Be Stopped by Software” Is Selected by Option Byte
Modification of operation stop time in the following figures
Addition of Note to and modification of Figure 9-1 Timing of A/D Converter Sampling
and A/D Conversion
Addition of Note 1 and Remark 2 to and modification of Table 9-1 Sampling Time and
A/D Conversion Time
Modification of Figure 9-2 Block Diagram of A/D Converter
Modification of Note 5, addition of Notes 1, 2, and Remark 2 to, and modification of
Figure 9-3 Format of A/D Converter Mode Register (ADM)
Modification of Figure 9-11 Relationship Between Analog Input Voltage and A/D
Conversion Result
Modification of 9.6 (1) Operating current in STOP mode, (4) Noise countermeasures,
and (6) Input impedance of ANI0 to ANI3 pins
Modification of capacitor value in Figure 9-19 Analog Input Pin Connection
Modification of Figure 9-21 Internal Equivalent Circuit of ANIn Pin and Table 9-4
Resistance and Capacitance Values (Reference Values) of Equivalent Circuit
Modification of description on operation stop time in 11.1.1 (2) STOP mode
Modification of Note in Figure 11-3 HALT Mode Release by Reset Input
Modification of operation stop time in the following figures.
Modification of Note in Figure 11-6 STOP Mode Release by Reset Input
Modification of the following figures
Addition of Note 1 to Figure 14-2 Format of Low-Voltage Detect Register (LVIM)
Addition of Note to Figure 14-3 Format of Low-Voltage Detection Level Select
Register (LVIS)
Addition of Note to 14.5 Cautions for Low-Voltage Detector <Action> (2) When used
as interrupt
Revision of CHAPTER 16 FLASH MEMORY
Figure 11-4 Operation Timing When STOP Mode Is Released
Figure 11-5 STOP Mode Release by Interrupt Request Generation
Figure 12-1 Block Diagram of Reset Function
Figure 12-2 Timing of Reset by RESET Input
Figure 12-3 Timing of Reset by Overflow of Watchdog Timer
Figure 12-4 Reset Timing by RESET Input in STOP Mode
Figure 8-6 Operation in STOP Mode (WDT Operation Clock: Clock to Peripheral
Hardware)
Figure 8-7 Operation in STOP Mode (WDT Operation Clock: Low-Speed Internal
Oscillation Clock)
APPENDIX E REVISION HISTORY
User’s Manual U16994EJ6V0UD
Description
CHAPTER 8
WATCHDOG TIMER
CHAPTER 9 A/D
CONVERTER
CHAPTER 11
STANDBY FUNCTION
CHAPTER 12 RESET
FUNCTION
CHAPTER 14 LOW-
VOLTAGE DETECTOR
CHAPTER 16 FLASH
MEMORY
Applied to:
(2/8)
355

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