UPD78F9212CS-CAB-A Renesas Electronics America, UPD78F9212CS-CAB-A Datasheet - Page 78

• Manufacturer Part Number: UPD78F9212CS-CAB-A
• Description: MCU 8BIT 4KB FLASH 16PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9212CS-CAB-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

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5.3
76
The clock generators are controlled by the following four registers.
(1) Processor clock control register (PCC) and preprocessor clock control register (PPCC)
Address: FFFBH, After reset: 02H, R/W
Symbol
PCC
Address: FFF3H, After reset: 02H, R/W
Symbol
PPCC
Processor clock control register (PCC)
Preprocessor clock control register (PPCC)
Low-speed internal oscillation mode register (LSRCM)
Oscillation stabilization time select register (OSTS)
Registers Controlling Clock Generators
These registers are used to specify the division ratio of the system clock.
PCC and PPCC are set by using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PCC and PPCC to 02H.
Notes 1. The setting range of the CPU clock differs depending on the supply voltage to be used.
PPCC1
7
0
7
0
0
0
0
1
0
1
Figure 5-3. Format of Preprocessor Clock Control Register (PPCC)
2. If PPCC = 01H, the clock (f
3. If PPCC = 02H, the clock (f
Figure 5-2. Format of Processor Clock Control Register (PCC)
Other than above
Be sure to refer to CPU clock and peripheral clock frequencies described in AC
Characteristics in CHAPTER 19 and CHAPTER 20.
PPCC0
6
0
6
0
0
1
0
0
1
0
CHAPTER 5 CLOCK GENERATORS
PCC1
5
0
5
0
0
0
1
0
1
1
User’s Manual U16994EJ6V0UD
f
f
f
f
f
f
Setting prohibited
X
X
X
X
X
X
/2
/2
/2
/2
/2
XP
XP
2
2 Note 3
3 Note 2
4 Note 3
Note 2
) supplied to the peripheral hardware is f
) supplied to the peripheral hardware is f
4
0
4
0
Selection of CPU clock (f
3
0
3
0
2
0
2
0
CPU
PPCC1
PCC1
)
Note 1
1
1
X
X
/2.
/2
2
.
PPCC0
0
0
0