UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 153

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UPD78F1144AGB-GAH-AX

Manufacturer Part Number
UPD78F1144AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1144AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1144AGB-GAH-AX
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RENESAS
Quantity:
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Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
(6) Peripheral enable registers 0 (PER0)
These registers are used to enable or disable use of each peripheral hardware macro. Clock supply to the
hardware that is not used is also stopped so as to decrease the power consumption and noise.
PER0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears theses registers to 00H.
Address: F00F0H
Symbol
PER0
Note The input clock that can be controlled by RTCEN is used when the register that is used by the
Caution Be sure to clear bits 1 and 6 of PER0 register to 0.
ADCEN
RTCEN
RTCEN
IIC0EN
<7>
0
1
0
1
0
1
real-time counter (RTC) is accessed from the CPU. RTCEN cannot control supply of the
operating clock (f
After reset: 00H
Figure 5-7. Format of Peripheral Enable Register 0 (PER0) (1/2)
Stops input clock supply.
• SFR used by the real-time counter (RTC) cannot be written.
• The real-time counter (RTC) is in the reset status.
Supplies input clock.
• SFR used by the real-time counter (RTC) can be read and written.
Stops input clock supply.
• SFR used by the A/D converter cannot be written.
• The A/D converter is in the reset status.
Supplies input clock.
• SFR used by the A/D converter can be read and written.
Stops input clock supply.
• SFR used by the serial interface IIC0 cannot be written.
• The serial interface IIC0 is in the reset status.
Supplies input clock.
• SFR used by the serial interface IIC0 can be read and written.
6
0
SUB
CHAPTER 5 CLOCK GENERATOR
R/W
ADCEN
) to RTC.
<5>
User’s Manual U17854EJ9V0UD
Control of real-time counter (RTC) input clock
Control of serial interface IIC0 input clock
Control of A/D converter input clock
IIC0EN
<4>
SAU1EN
<3>
SAU0EN
<2>
Note
1
0
TAU0EN
<0>
151

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