UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 229

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark
TAU
default
setting
Channel
default
setting
Operation
start
During
operation
Operation
stop
TAU stop
n = 0 to 7, k = 0 to 6
Sets the TAU0EN bit of the PER0 register to 1.
Sets the TPS0 register.
Sets the TMR0n register (determines operation mode of
channel).
Sets number of counts to the TDR0n register.
Clears the TOE0k bit of the TOE0 register to 0.
Sets the TS0n bit to 1.
Set value of the TDR0n register can be changed.
The TCR0n register can always be read.
The TSR0n register is not used.
Set values of the TMR0n register, TOM0n, TOL0n, TO0n,
and TOE0n bits cannot be changed.
The TT0n bit is set to 1.
The TAU0EN bit of the PER0 register is cleared to 0.
Determines clock frequencies of CK00 and CK01.
The TS0n bit automatically returns to 0 because it is a
trigger bit.
The TT0n bit automatically returns to 0 because it is a
trigger bit.
Figure 6-42. Operation Procedure When External Event Counter Function Is Used
Software Operation
CHAPTER 6 TIMER ARRAY UNIT
User’s Manual U17854EJ9V0UD
Channel stops operating.
(Clock is supplied and some power is consumed.)
Counter (TCR0n) counts down each time input edge of the
TI0k pin has been detected. When count value reaches
0000H, the value of TDR0n is loaded to TCR0n again, and
the count operation is continued. By detecting TCR0n =
0000H, the INTTM0n output is generated.
After that, the above operation is repeated.
Power-off status
Power-on status. Each channel stops operating.
TE0n = 1, and count operation starts.
TE0n = 0, and count operation stops.
Power-off status
(Clock supply is stopped and writing to each register is
disabled.)
(Clock supply is started and writing to each register is
enabled.)
Value of TDR0n is loaded to TCR0n and detection of
the TI0k pin input edge is awaited.
TCR0n holds count value and stops.
All circuits are initialized and SFR of each channel is
also initialized.
Hardware Status
227