UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 260

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

258
TMR0p
TMR0q
TOM0
TOE0
TOL0
Remark
TO0
(a) Timer mode register 0p, 0q (TMR0p, TMR0q)
(b) Timer output register 0 (TO0)
(c) Timer output enable register 0 (TOE0)
(d) Timer output level register 0 (TOL0)
(e) Timer output mode register 0 (TOM0)
TOM0q
CKS0p
CKS0q
When Multiple PWM Output Function (Slave Channel) Is Used (output two types of PWMs)
TOE0q
TOL0q
TO0q
Bit q
Bit q
Bit q
Bit q
1/0
1/0
1/0
1/0
1/0
15
15
1
n = 0, 2, 4; p = n+1; q = n+2
Operation clock selection
TOE0p
TOM0p
TOL0p
TO0p
Bit p
Bit p
Bit p
Bit p
1/0
1/0
1/0
14
14
0: Selects CK00 as operation clock of channel p, q.
1: Selects CK01 as operation clock of channel p, q.
0
0
1
* Make the same setting as master channel.
13
13
0
0
CCS0p
CCS0q
0: Outputs 0 from TO0p or TO0q.
1: Outputs 1 from TO0p or TO0q.
0: Stops the TO0p or TO0q output operation by counting operation.
1: Enables the TO0p or TO0q output operation by counting operation.
0: Positive logic output (active-high)
1: Inverted output (active-low)
1: Sets the combination-operation mode.
12
12
Figure 6-68. Example of Set Contents of Registers
0
0
Count clock selection
TER0p
TER0q
MAS
MAS
11
11
0: Selects operation clock.
0
0
CHAPTER 6 TIMER ARRAY UNIT
Slave/master selection
STS0p2
STS0q2
10
10
0: Channel 0 is set as slave channel.
1
1
User’s Manual U17854EJ9V0UD
STS0p1
STS0q1
9
0
9
0
Start trigger selection
STS0p0
STS0q0
100B: Selects INTTM0n of master channel.
8
0
8
0
CIS0p1
CIS0q1
0
0
7
7
CIS0p0
CIS0q0
6
0
6
0
Selection of TI0p and TI0q pin input edge
00B: Sets 00B because these are not used.
Operation mode of channel p, q
100B: One-count mode
0
0
5
5
4
0
4
0
Start trigger during operation
MD0p3
MD0q3
1: Trigger input is valid.
3
1
3
1
MD0p2
MD0q2
2
0
2
0
MD0p1
MD0q1
1
0
1
0
MD0p0
MD0q0
0
1
0
1