UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 380

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

378
(2) Operation procedure
Caution
Remark
Even after communication is stopped, the pin level is retained. To resume the operation, re-set the
SO0 register (see Figure 11-35 Procedure for Resuming Master Reception).
After setting the PER0 register to 1, be sure to set the SPS0 register after 4 or more clocks
have elapsed.
Starting communication
Setting SMR0n register
Setting SCR0n register
Setting SDR0n register
Writing to SS0 register
Setting PER0 register
Setting SPS0 register
Starting initial setting
Setting SO0 register
Stopping communication
Starting setting to stop
Setting ST0 register
Figure 11-33. Initial Setting Procedure for Master Reception
Setting port
Figure 11-34. Procedure for Stopping Master Reception
CHAPTER 11 SERIAL ARRAY UNIT
User’s Manual U17854EJ9V0UD
Enable clock output of the target channel
by setting a port register and a port mode
register.
Set the operation clock.
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate.
Manipulate the CKO0n bit and set an
initial output level.
SE0n = 1 when the SS0n bit of the target
channel is set to 1.
Set dummy data to the SIOp register (bits
7 to 0 of the SDR0n register) and start
communication.
Release the serial array unit from the
reset status and start clock supply.
Write 1 to the ST0n bit of the target
channel.
Stop communication in midway.