UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 384

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
382
Figure 11-38. Timing Chart of Master Reception (in Continuous Reception Mode) (Type 1: DAP0n = 0, CKP0n = 0)
register 0n
SCKp pin
(4) Processing flow (in continuous reception mode)
INTCSIp
MD0n0
TSF0n
SDR0n
BFF0n
SIp pin
SS0n
SE0n
ST0n
Shift
Caution The MD0n0 bit can be rewritten even during operation.
Remarks 1. <1> to <8> in the figure correspond to <1> to <8> in Figure 11-39 Flowchart of Master
<1> <2>
However, rewrite it before receive of the last bit is started, so that it has been rewritten before
the transfer end interrupt of the last receive data.
2. n: Channel number (n = 0, 2), p: CSI number (p = 00, 10)
Reception (in Continuous Reception Mode).
Write
<3>
Dummy data
Data reception (8-bit length)
Reception & shift operation
Receive data 1
<2>
Write
Dummy data
CHAPTER 11 SERIAL ARRAY UNIT
User’s Manual U17854EJ9V0UD
<3>
Receive data 1
Data reception (8-bit length)
Reception & shift operation
Receive data 2
<4> <2>
Read
Write
Dummy data
<3>
Reception & shift operation
<4>
Receive data 2
Data reception (8-bit length)
Receive data 3
Read
<5>
Receive data 3
Read
<6>
<7> <8>