UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 39

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.2.6 P50 to P55 (port 5)
(1) Port mode
2.2.7 P60 to P63 (port 6)
(1) Port mode
(2) Control mode
2.2.8 P70 to P77 (port 7)
request input.
(2) Control mode
P50 to P55 function as a 6-bit I/O port. These pins also function as external interrupt request input.
The following operation modes can be specified in 1-bit units.
P60 to P63 function as a 4-bit I/O port. These pins also function as serial interface data I/O and clock I/O.
The following operation modes can be specified in 1-bit units.
P70 to P77 function as an 8-bit I/O port. These pins also function as key interrupt input and external interrupt
The following operation modes can be specified in 1-bit units.
P50 to P55 function as a 6-bit I/O port. P50 to P55 can be set to input or output port in 1-bit units using port
mode register 5 (PM5). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 5
(PU5).
P50 and P51 function as external interrupt request input.
(a) INTP1, INTP2
P60 to P63 function as a 4-bit I/O port. P60 to P63 can be set to input port or output port in 1-bit units using port
mode register 6 (PM6).
Output of P60 to P63 is N-ch open-drain output (6 V tolerance).
P60 and P61 function as serial interface data I/O and clock I/O.
(a) SDA0
(b) SCL0
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
This is a serial data I/O pin of serial interface IIC0.
This is a serial clock I/O pin of serial interface IIC0.
(b) In normal operation mode and when on-chip debugging is enabled (OCDENSET = 1) by
(c) When on-chip debug function is used, or in write mode of flash memory programmer
an option byte (000C3H)
=> Connect this pin to EV
=> Use this pin as TOOL0.
the pin before reset release.
Directly connect this pin to the on-chip debug emulator or a flash memory
programmer, or pull it up by connecting it to EV
CHAPTER 2 PIN FUNCTIONS
User’s Manual U17854EJ9V0UD
DD
via an external resistor, and always input a high level to
DD
via an external resistor.
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