UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 392

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UPD78F1144AGB-GAH-AX

Manufacturer Part Number
UPD78F1144AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1144AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
390
Figure 11-46. Timing Chart of Master Transmission/Reception (in Continuous Transmission/Reception Mode)
register 0n
(4) Processing flow (in continuous transmission/reception mode)
SCKp pin
INTCSIp
SOp pin
MD0n0
SDR0n
TSF0n
BFF0n
SIp pin
SS0n
SE0n
ST0n
Caution The MD0n0 bit can be rewritten even during operation.
Notes 1. When transmit data is written to the SDR0n register while BFF0n = 1, the transmit data is
Remarks 1. <1> to <8> in the figure correspond to <1> to <8> in Figure 11-47 Flowchart of Master
Shift
<1> <2>
2. The transmit data can be read by reading the SDR0n register during this period. At this time, the
(Note 1)
However, rewrite it before transfer of the last bit is started, so that it has been rewritten
before the transfer end interrupt of the last transmit data.
2. n: Channel number (n = 0, 2), p: CSI number (p = 00, 10)
overwritten.
transfer operation is not affected.
Write
<3>
Transmit data 1
Transmission/Reception (in Continuous Transmission/Reception Mode).
Data transmission/reception (8-bit length) Data transmission/reception (8-bit length) Data transmission/reception (8-bit length)
Reception & shift operation
Transmit data 1
Receive data 1
<2>
Write
Transmit data 2
(Note 2)
CHAPTER 11 SERIAL ARRAY UNIT
(Type 1: DAP0n = 0, CKP0n = 0)
User’s Manual U17854EJ9V0UD
<3>
Receive data 1
Reception & shift operation
Transmit data 2
Receive data 2
<4> <2>
Read
Write
Transmit data 3
(Note 2)
<3>
Reception & shift operation
<4>
Receive data 3
Transmit data 3
Receive data 2
Read
<5>
Receive data 3
Read
<6>
<7> <8>

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