UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 454

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UPD78F1144AGB-GAH-AX

Manufacturer Part Number
UPD78F1144AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1144AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Manufacturer
Quantity
Price
Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
RENESAS
Quantity:
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Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
452
(1) Register setting
SMR02
SCR02
SDR02
Figure 11-93. Example of Contents of Registers for Address Field Transmission of Simplified I
SOE0
SO0
SS0
(a) Serial output register 0 (SO0) … Sets only the bits of the target channel.
(b) Serial output enable register 0 (SOE0) … Sets only the bits of the target channel.
(c) Serial channel start register 0 (SS0) … Sets only the bits of the target channel is 1.
(d) Serial mode register 02 (SMR02)
(e) Serial communication operation setting register 02 (SCR02)
(f) Serial data register 02 (SDR02) (lower 8 bits: SIO10)
Remark
CKS02
TXE02
0/1
15
15
15
15
15
15
0
0
0
1
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
CCS02
RXE02
14
14
14
14
14
14
0
0
0
0
0
: Setting is fixed in the IIC mode,
DAP02
13
13
13
13
13
13
0
0
0
0
0
Baud rate setting
Setting of parity bit
00B: No parity
CKP02
12
12
12
12
12
12
0
0
0
0
0
11
11
11
11
11
11
0
1
0
0
0
CHAPTER 11 SERIAL ARRAY UNIT
EOC02
CKO02
0/1
10
10
10
10
10
10
0
0
0
0
User’s Manual U17854EJ9V0UD
PTC021
Start condition is generated by manipulating the SO02 bit.
SOE02 = 0 until the start condition is generated, and SOE02 = 1
after generation.
9
1
9
0
9
0
9
0
9
0
9
PTC020
CKO00
STS02
×
8
0
8
0
: Setting disabled (set to the initial value)
8
8
0
8
0
8
0
DIR02
0
0
7
0
7
7
0
7
0
7
7
SIS020
0
0
0
6
0
0
6
6
6
6
6
Transmit data setting (address + R/W)
SLC021
0
5
0
0
0
5
1
5
5
5
5
SLC020
Interrupt sources of channel 2
0: Transfer end interrupt
4
0
0
4
0
4
1
4
0
4
4
SIO10
SS03
Setting of stop bit
01B: Appending 1 bit (ACK)
1
3
0
3
0
3
3
0
3
×
3
MD022
DLS022
SOE02
SO02
SS02
0/1
0/1
0/1
1
2
1
2
2
2
2
2
MD021
DLS021
SS01
1
0
1
1
1
0
1
×
1
1
1
2
MD020
DLS020
SOE00
C (IIC10)
SO00
SS00
0
×
×
×
0
0
0
1
0
0
0

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