UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 455

• Manufacturer Part Number: UPD78F1144AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1144AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Operation procedure
Caution
Changing setting of SOE0 register
After setting the PER0 register to 1, be sure to set the SPS0 register after 4 or more clocks
have elapsed.
Figure 11-94. Initial Setting Procedure for Address Field Transmission
Starting communication
Setting SMR02 register
Setting SCR02 register
Setting SDR02 register
Writing to SS0 register
Setting PER0 register
Setting SPS0 register
Starting initial setting
Setting SO0 register
Setting SO0 register
Setting SO0 register
Setting port
Wait
CHAPTER 11 SERIAL ARRAY UNIT
User’s Manual U17854EJ9V0UD
Release the serial array unit from the
reset status and start clock supply.
Enable data output, clock output, and the N-ch
open-drain output (V
target channel by setting a port register, a port
mode register, and a port output mode register.
Set the operation clock .
Set an operation mode, etc.
Set a communication format.
Set a transfer baud rate.
Manipulate the SO02 and CKO02 bits
and set an initial output level.
Clear the SO02 bit to 0 to generate the
start condition.
Secure a wait time so that the specifications of
I
Clear the CKO02 bit to 0 to lower the
clock output level.
Set the SOE02 bit to 1 and enable data
output of the target channel.
Set the SS02 bit of the target channel to
1 to set SE02 = 1.
Set address and R/W to the SIO10
register (bits 7 to 0 of the SDR02
register) and start communication.
2
C on the slave side are satisfied.
DD
tolerance) mode of the
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