UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 465

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UPD78F1144AGB-GAH-AX

Manufacturer Part Number
UPD78F1144AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1144AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
released.
11.7.4 Stop condition generation
SDA10 output
SCL10 output
After all data are transmitted to or received from the target slave, a stop condition is generated and the bus is
(1) Processing flow
SOE02
Note During the receive operation, the SOE02 bit is set to 0 before receiving the last data.
SE02
ST02
Note
Figure 11-103. Timing Chart of Stop Condition Generation
Figure 11-104. Flowchart of Stop Condition Generation
Operation
stop
CHAPTER 11 SERIAL ARRAY UNIT
Writing 1 to ST02 bit to clear
User’s Manual U17854EJ9V0UD
Starting generation of stop condition.
SO02 bit
manipulation
transmission/data reception
End of IIC communication
Writing 1 to CKO02 bit
Writing 0 to SOE02 bit
(SE02 is cleared to 0)
Writing 1 to SO02 bit
Writing 0 to SO02 bit
Completion of data
Wait
Stop condition
CKO02 bit
manipulation
SO02 bit
manipulation
Secure a wait time so that the specifications of
I
2
C on the slave side are satisfied.
463

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