UPD78F1144AGB-GAH-AX Renesas Electronics America, UPD78F1144AGB-GAH-AX Datasheet - Page 654

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UPD78F1144AGB-GAH-AX

Manufacturer Part Number
UPD78F1144AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1144AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
UPD78F1144AGB-GAH-AX
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Quantity:
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Part Number:
UPD78F1144AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
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(2) Delay from the time LVI reset source is generated until the time LVI reset has been generated or released
652
Figure 20-12. Delay from the time LVI reset source is generated until the time LVI reset has been generated or released
There is some delay from the time supply voltage (V
been generated.
In the same way, there is also some delay from the time LVI detection voltage (V
the time LVI reset has been released (see Figure 20-12).
See the timing in Figure 20-2 (2) When LVI is ON upon power application (option byte: LVIOFF = 0) for the
reset processing time until the normal operation is entered after the LVI reset is released.
Remark If bit 2 (LVISEL) of the low voltage detection register (LVIM) is set to “1”, the meanings of the above
<1> :
<2> :
Operation example 2: When used as interrupt
Supply voltage (V
<Action>
voltage (V
interrupt by using bit 0 (LVIF) of the low-voltage detection register (LVIM). Clear bit 1 (LVIIF) of interrupt
request flag register 0L (IF0L) to 0.
action after waiting for the supply voltage fluctuation time.
Confirm that “supply voltage (V
For a system with a long supply voltage fluctuation period near the LVI detection voltage, take the above
LVI reset signal
Minimum pulse width (200
Detection delay time (200
Interrupt requests may be generated frequently.
Take the following action.
words change as follows.
• Supply voltage (V
• Detection voltage (V
LVIF flag
DD
V
DD
LVI
) < detection voltage (V
)
DD
)
<1>
LVI
CHAPTER 20 LOW-VOLTAGE DETECTOR
μ
DD
μ
) → Detection voltage (V
s (MAX.))
s (MIN.))
→ Input voltage from external input pin (EXLVI)
<2>
) ≥ detection voltage (V
LVI
)” when detecting the rising edge of V
User’s Manual U17854EJ9V0UD
DD
) < LVI detection voltage (V
EXLVI
LVI
)” when detecting the falling edge of V
= 1.21 V)
<1>
<2>
DD
, in the servicing routine of the LVI
LVI
LVI
Time
) ≤ supply voltage (V
) until the time LVI reset has
DD
, or “supply
DD
) until

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