SAB-C161S-L25M AA Infineon Technologies, SAB-C161S-L25M AA Datasheet - Page 14

• Manufacturer Part Number: SAB-C161S-L25M AA
• Description: IC MICROCONTROLLER 16BIT MQFP80
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C161S-L25M AA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-SQFP
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: ASC, SSC
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 63
• Number Of Timers: 5
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Packages: PG-MQFP-80
• Max Clock Frequency: 25.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: B161SL25MAAXT; SABC161SL25MAAXT; SP000014739

3
The architecture of the C161S combines advantages of both RISC and CISC processors
and of advanced peripheral subsystems in a very well-balanced way. In addition the on-
chip memory blocks allow the design of compact systems with maximum performance.
Figure 3
high bandwidth internal bus structure of the C161S.
Note: All time specifications refer to a CPU clock of 20 MHz
Figure 3
The program memory, the internal RAM (IRAM) and the set of generic peripherals are
connected to the CPU via separate buses. A fourth bus, the XBUS, connects external
resources as well as additional on-chip resources, the X-Peripherals (see
Data Sheet
4
6
(see definition in the AC Characteristics section).
ProgMem
Internal
gives an overview of the different on-chip components and of the advanced,
ROM
Area
Functional Description
XBUS Control
External Bus
Port 0
Block Diagram
Control
16
EBC
Instr. / Data
16
16
Port 1
32
16
External Instr. / Data
(USART)
ASC0
BRGen
Interrupt Controller 16-Level
Port 3
C166-Core
CPU
BRGen
SSC
(SPI)
10
12
PEC
Priority
GPT
T2
T3
T4
T5
T6
Interrupt Bus
Peripheral Data Bus
Data
Data
16
Functional Description
Port 5
2
16
16
RTC
Osc / PLL
2 Kbytes
IRAM
Internal
MCB04323_1S.vsd
RAM
Figure
V1.0, 2003-11
WDT
C161S
3).
XTAL
7