SAB-C161S-L25M AA Infineon Technologies, SAB-C161S-L25M AA Datasheet - Page 21

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SAB-C161S-L25M AA

Manufacturer Part Number
SAB-C161S-L25M AA
Description
IC MICROCONTROLLER 16BIT MQFP80
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAB-C161S-L25M AA

Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
63
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
80-SQFP
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
ASC, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
63
Number Of Timers
5
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Packages
PG-MQFP-80
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
2.0 KByte
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
B161SL25MAAXT
SABC161SL25MAAXT
SP000014739
The C161S also provides an excellent mechanism to identify and to process exceptions
or error conditions that arise during run-time, so-called ‘Hardware Traps’. Hardware
traps cause immediate non-maskable system reaction which is similar to a standard
interrupt service (branching to a dedicated vector table location). The occurrence of a
hardware trap is additionally signified by an individual bit in the trap flag register (TFR).
Except when another higher prioritized trap service is in progress, a hardware trap will
interrupt any actual program execution. In turn, hardware trap services can normally not
be interrupted by standard or PEC interrupts.
Table 4
time:
Table 4
Exception Condition
Reset Functions:
Class A Hardware Traps:
Class B Hardware Traps:
Reserved
Software Traps
Data Sheet
Hardware Reset
Software Reset
W-dog Timer Overflow
Non-Maskable
Interrupt
Stack Overflow
Stack Underflow
Undefined Opcode
Protected Instruction
Fault
Illegal Word Operand
Access
Illegal Instruction
Access
Illegal External Bus
Access
TRAP Instruction
shows all of the possible exceptions or error conditions that can arise during run-
Hardware Trap Summary
Trap
Flag
NMI
STKOF
STKUF
UNDOPC
PRTFLT
ILLOPA
ILLINA
ILLBUS
Trap
Vector
RESET
RESET
RESET
NMITRAP
STOTRAP
STUTRAP
BTRAP
BTRAP
BTRAP
BTRAP
BTRAP
17
Vector
Location
00’0000
00’0000
00’0000
00’0008
00’0010
00’0018
00’0028
00’0028
00’0028
00’0028
00’0028
[2C
3C
Any
[00’0000
00’01FC
in steps of
4
H
H
H
]
H
H
H
H
H
H
H
H
H
H
H
H
H
Functional Description
]
Trap
Number
00
00
00
02
04
06
0A
0A
0A
0A
0A
[0B
0F
Any
[00
7F
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
]
]
V1.0, 2003-11
Trap
Priority
III
III
III
II
II
II
I
I
I
I
I
Current
CPU
Priority
C161S

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