SAB-C161S-L25M AA Infineon Technologies, SAB-C161S-L25M AA Datasheet - Page 30

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SAB-C161S-L25M AA

Manufacturer Part Number
SAB-C161S-L25M AA
Description
IC MICROCONTROLLER 16BIT MQFP80
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAB-C161S-L25M AA

Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
63
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
80-SQFP
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
ASC, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
63
Number Of Timers
5
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Packages
PG-MQFP-80
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
2.0 KByte
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
B161SL25MAAXT
SABC161SL25MAAXT
SP000014739
3.11
Table 5
The various addressing modes that can be used with a specific instruction, the operation
of the instructions, parameters for conditional execution of instructions, and the opcodes
for each instruction can be found in the “C166 Family Instruction Set Manual”.
This document also provides a detailed description of each instruction.
Table 5
Mnemonic
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR
BSET
BMOV(N)
BAND, BOR,
BXOR
BCMP
BFLDH/L
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL / SHR
ROL / ROR
ASHR
Data Sheet
lists the instructions of the C161S in a condensed way.
Instruction Set Summary
Instruction Set Summary
Description
Subtract word (byte) operands
Subtract word (byte) operands with Carry
(Un)Signed multiply direct GPR by direct GPR (16-
Complement direct word (byte) GPR
Negate direct word (byte) GPR
Bitwise AND, (word/byte operands)
Bitwise OR, (word/byte operands)
Bitwise XOR, (word/byte operands)
Clear direct bit
Set direct bit
Move (negated) direct bit to direct bit
AND/OR/XOR direct bit with direct bit
Bitwise modify masked high/low byte of bit-addressable
direct word memory with immediate data
Compare word (byte) operands
Compare word data to GPR and increment GPR by 1/2
Determine number of shift cycles to normalize direct
word GPR and store result in direct word GPR
Shift left/right direct word GPR
Arithmetic (sign bit) shift right direct word GPR
Add word (byte) operands
Add word (byte) operands with Carry
(Un)Signed divide register MDL by direct GPR (16-/16-bit)
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit)
Compare direct bit to direct bit
Compare word data to GPR and decrement GPR by 1/2
Rotate left/right direct word GPR
26
Functional Description
16-bit) 2
V1.0, 2003-11
Bytes
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2
2
2
2
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2
2
2
C161S

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