SAB-C161S-L25M AA Infineon Technologies, SAB-C161S-L25M AA Datasheet - Page 57

• Manufacturer Part Number: SAB-C161S-L25M AA
• Description: IC MICROCONTROLLER 16BIT MQFP80
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C161S-L25M AA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-SQFP
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: ASC, SSC
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 63
• Number Of Timers: 5
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Packages: PG-MQFP-80
• Max Clock Frequency: 25.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: B161SL25MAAXT; SABC161SL25MAAXT; SP000014739

Table 17
ALE cycle time = 6 TCL + 2
Parameter
ALE high time
Address setup to ALE
Address hold after ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
Address float after RD,
WR (with RW-delay)
Address float after RD,
WR (no RW-delay)
RD, WR low time
(with RW-delay)
RD, WR low time
(no RW-delay)
RD to valid data in
(with RW-delay)
RD to valid data in
(no RW-delay)
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD
Data Sheet
Multiplexed Bus (Reduced Supply Voltage Range)
(Operating Conditions apply)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
t
A
+
t
C
CC 11 +
CC 5 +
CC 15 +
CC 15 +
CC -10 +
CC –
CC –
CC 34 +
CC 59 +
SR –
SR –
SR –
SR –
SR 0
SR –
+
t
F
Min.
Max. CPU Clock
(150 ns at 20 MHz CPU clock without waitstates)
t
= 20 MHz
A
53
t
t
t
t
t
A
A
A
t
C
C
A
Max.
–
–
–
–
–
6
31
–
–
22 +
47 +
45 +
+
57 + 2
+
–
36 +
t
t
C
C
t
t
t
t
C
C
A
F
t
A
1 / 2TCL = 1 to 20 MHz
Min.
TCL - 14
+
TCL - 20
+
TCL - 10
+
TCL - 10
+
-10 +
–
–
2TCL - 16
+
3TCL - 16
+
–
–
–
–
0
–
Variable CPU Clock
t
t
t
t
t
t
A
A
A
A
C
C
Timing Characteristics
t
A
Max.
–
–
–
–
–
6
TCL + 6
–
–
2TCL - 28
+
3TCL - 28
+
3TCL - 30
+
4TCL - 43
+ 2
–
2TCL - 14
+
t
t
t
t
C
C
A
F
t
A
+
V1.0, 2003-11
+
t
C
t
C
C161S
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns