UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 145

• Manufacturer Part Number: UPD78F1146AGB-GAH-AX
• Description: MCU 16BIT 78K0R/KX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1146AGB-GAH-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
<R>
(1) Clock operation mode control register (CMC)
This register is used to set the operation mode of the X1/P121, X2/EXCLK/P122, XT1/P123, and XT2/P124 pins,
and to select a gain of the oscillator.
CMC can be written only once by an 8-bit memory manipulation instruction after reset release. This register can
be read by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Address: FFFA0H
Symbol
CMC
Cautions 1. CMC can be written only once after reset release, by an 8-bit memory
Remark f
OSCSELS
EXCLK
EXCLK
AMPH
Figure 5-2. Format of Clock Operation Mode Control Register (CMC)
7
0
0
1
1
0
1
0
1
After reset: 00H
X
2. After reset release, set CMC before X1 or XT1 oscillation is started as set by the
3. Be sure to set AMPH to 1 if the X1 clock oscillation frequency exceeds 10 MHz.
4. It is recommended to set the default value (00H) to CMC after reset release, even
:
Input port mode
2 MHz ≤ f
10 MHz < f
XT1 oscillation mode
OSCSEL
manipulation instruction.
clock operation status control register (CSC).
when the register is used at the default value, in order to prevent malfunctioning
during a program loop.
OSCSEL
Subsystem clock pin operation mode
X1 clock oscillation frequency
6
0
1
0
1
X
X
≤ 10 MHz
≤ 20 MHz
CHAPTER 5 CLOCK GENERATOR
Input port mode
X1 oscillation mode
Input port mode
External clock input mode
High-speed system clock
R/W
pin operation mode
User’s Manual U17854EJ9V0UD
0
5
Control of X1 clock oscillation frequency
OSCSELS
4
Input port
Crystal resonator connection
Input port
Crystal/ceramic resonator connection
Input port
Input port
3
0
XT1/P123 pin
X1/P121 pin
2
0
External clock input
X2/EXCLK/P122 pin
1
0
XT2/P124 pin
AMPH
0
143